Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Compilation error (275024/275023 & 12153)

THaas1
Beginner
1,353 Views

Hi, I have to design a 4 bit binary adder, but I cannot find the origine of those errors,

 

all help is welcomed,

thanksCapture d'écran 2020-03-31 14.23.44.png

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RichardTanSY_Intel
1,287 Views

Hi,

The error occurs because in a Block Design Files (.bdf), the primitive for the specified instance and type has a width mismatch between the source and the specified port. The number of bits of the input must be equal to that of the output. Correct the design so that the input is equal to the output.

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THaas1
Beginner
1,287 Views

yes, thank you for your answer

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