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Altera_Forum
Honored Contributor I
1,136 Views

Current Limit Exceeded

Hi All, 

 

I am using a MAX V 5M2210ZF256 CPLD to drive a bunch of LEDs and when I try to compile my program I get the following error: 

 

"Error (169007): Current density too high in I/O bank 2 -- pins combined exceed the limit (130.0 mA) by 10.0 mA" 

 

I do understand that the current capability of the bank (bank 2) is only 130mA and my requirement exceeds it by 10mA. But in an earlier project that I have done using the MAX V 5M2210ZF324C5N CPLD I have connected LEDs to a single bank in such a way that it exceeds the current limit of the bank and successfully compiled and implemented the design. What is the reason I could successfully compile my design earlier and not now? Is there any workaround for the present problem?
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2 Replies
Altera_Forum
Honored Contributor I
45 Views

 

--- Quote Start ---  

Hi All, 

 

I am using a MAX V 5M2210ZF256 CPLD to drive a bunch of LEDs and when I try to compile my program I get the following error: 

 

"Error (169007): Current density too high in I/O bank 2 -- pins combined exceed the limit (130.0 mA) by 10.0 mA" 

 

I do understand that the current capability of the bank (bank 2) is only 130mA and my requirement exceeds it by 10mA. But in an earlier project that I have done using the MAX V 5M2210ZF324C5N CPLD I have connected LEDs to a single bank in such a way that it exceeds the current limit of the bank and successfully compiled and implemented the design. What is the reason I could successfully compile my design earlier and not now? Is there any workaround for the present problem? 

--- Quote End ---  

 

 

Hi djp, 

Maybe you compiled your previous design with a different Quartus version? I have seen stunts like this one before... Or maybe there exists an assignment to tell Quartus that not all your LEDs will be turned on at the same time, in a way that will keep the CPLD always healthy. 

 

Anyway, shouldn't it be a better solution just to move a few leds away from that bank and keep your CPLD working under nominal conditions? Or to introduce series resistors between the CPLD and the LEDs?
Altera_Forum
Honored Contributor I
45 Views

What I/O constraints are you setting for these output pins? Post the project's .qsf file for us to look at. 

 

Cheers, 

Alex
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