Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Cyclone IV ModelSim gate level simulation accuracy

KittyBumpkins
Beginner
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I have a Cyclone IV design that shows different timing results in a ModelSim gate level simulation as compared to the Timing Analyzer results. For some output pins the Timing Analyzer shows about 600 ps more setup time than the timing analyzer shows. Is this a known problem? Should I use the timing analyzer rather than the gate level simulation to verify the design?

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SyafieqS
Employee
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Hi Nuno,


Assuming your verification is timing, yes I would suggest you to use Timing Analyzer static timing analysis rather than gate-level timing simulation. Gate-level timing simulation of an entire design can be slow and should be avoided even though it supports your device


Thanks,

Regards



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SyafieqS
Employee
552 Views

Hi Nuno,


Assuming your verification is timing, yes I would suggest you to use Timing Analyzer static timing analysis rather than gate-level timing simulation. Gate-level timing simulation of an entire design can be slow and should be avoided even though it supports your device


Thanks,

Regards



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