I have a Cyclone IV design that shows different timing results in a ModelSim gate level simulation as compared to the Timing Analyzer results. For some output pins the Timing Analyzer shows about 600 ps more setup time than the timing analyzer shows. Is this a known problem? Should I use the timing analyzer rather than the gate level simulation to verify the design?
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Hi Nuno,
Assuming your verification is timing, yes I would suggest you to use Timing Analyzer static timing analysis rather than gate-level timing simulation. Gate-level timing simulation of an entire design can be slow and should be avoided even though it supports your device
Thanks,
Regards
Hi Nuno,
Assuming your verification is timing, yes I would suggest you to use Timing Analyzer static timing analysis rather than gate-level timing simulation. Gate-level timing simulation of an entire design can be slow and should be avoided even though it supports your device
Thanks,
Regards
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