DDR2 IP Problem

[Dragon666]

I created a DDR2 IP and planned to use ModelSim to simulate the waveform, but when I pressed RTL Simultion, the following error message popped up. How can I solve it?

Version : Quartus II 13.0sp1 (64-bit) Web Edition

Info: Start Nativelink Simulation process
Error: You did not generate the simulation model files or you generated the IP file using an older version of MegaCore which is not supported by RTL NativeLink Simulation
Error: Regenerate the IP and simulation model files using the latest version of MegaCore for RTL NativeLink Simulation flow to function correctly
Error: NativeLink simulation flow was NOT successful

================The following additional information is provided to help identify the cause of error while running nativelink scripts=================
Nativelink TCL script failed with errorCode: NONE
Nativelink TCL script failed with errorInfo: Regenerate the IP and simulation model files using the latest version of MegaCore for RTL NativeLink Simulation flow to function correctly
(procedure "get_ip_info" line 1)
invoked from within
"get_ip_info $full_file_name"
(procedure "run_eda_simulation_tool" line 195)
invoked from within
"run_eda_simulation_tool eda_opts_hash"

[sstrell]

Like it says, you need to synthesize the design before you can use Nativelink.

[Dragon666]

Hello, glad to see your reply
But I have successfully synthesized it, so the problem may lie elsewhere.

[AdzimZM_Intel]

Hello,

Have you regenerate the IP and simulation model with latest version of MegaCore?

The log has reported about that. You may check if you need to upgrade to latest version.

Regards,

Adzim