DE1-SoC Transferring data from the FPGA to the HPS

[Altera_Forum]

Hi everyone! 

I've been looking everywhere and could not find any resources to help me.  I am working with a DE1-SoC Cyclone V board. I need to send data from the HPS to the FPGA and send it back from the FPGA to the HPS. I can do the first part without a problem by using the H2F bridge and the Avalon MM interface and using a C program to send the data. However, I could not find any resources on how to send data from the FPGA to the HPS. I know this is possible through the F2H bridge, or through the SDRAM or through an interrupt, but I'm finding it hard to understand how to do it using Quartus and a C program.  Can anyone point me towards anything that could help?  Thank you!

[Altera_Forum]

You have a number of choices. Depending on what tradeoffs you want to make between performance, engineering design time, and FPGA resource usage. You could use the HPS to FPGA bridge and use the HPS DMA engine to transfer data. You could also include a DMA engine in the FPGA fabric and connect to either the FPGA to HPS bridge or the FPGA to SDRAM controller bridge. If you don't need to move lots of data or don't care about performacne the simplest way would be to use the H2F bridge you have setup already and do read operations instead of write.

[Altera_Forum]

--- Quote Start ---  You have a number of choices. Depending on what tradeoffs you want to make between performance, engineering design time, and FPGA resource usage. You could use the HPS to FPGA bridge and use the HPS DMA engine to transfer data. You could also include a DMA engine in the FPGA fabric and connect to either the FPGA to HPS bridge or the FPGA to SDRAM controller bridge. If you don't need to move lots of data or don't care about performacne the simplest way would be to use the H2F bridge you have setup already and do read operations instead of write.  --- Quote End ---    Thanks for the reply. The ideal solution would be writing from the FPGA to the SDRAM and then reading it from the HPS. I have no idea how to even start doing this though. Do you know of any tutorial/source code/example I could look at that demonstrates this?  Thanks!

[Altera_Forum]

--- Quote Start ---  Thanks for the reply. The ideal solution would be writing from the FPGA to the SDRAM and then reading it from the HPS. I have no idea how to even start doing this though. Do you know of any tutorial/source code/example I could look at that demonstrates this?  Thanks!  --- Quote End ---    Learn about the Avalon bus that QSYS uses. You will write code to implement an Avalon master to talk to the f2h_sdram bridge that is implemented by the HPS. To connect it together, you will need to create a custom QSYS component to contain your code. Your component will need to implement an Avalon master and whatever other I/O it needs. There are several tutorials on how to do this on altera.com. It is also covered in the QSYS documentation which I would recommend reading.

[Altera_Forum]

--- Quote Start ---  Learn about the Avalon bus that QSYS uses. You will write code to implement an Avalon master to talk to the f2h_sdram bridge that is implemented by the HPS. To connect it together, you will need to create a custom QSYS component to contain your code. Your component will need to implement an Avalon master and whatever other I/O it needs. There are several tutorials on how to do this on altera.com. It is also covered in the QSYS documentation which I would recommend reading.  --- Quote End ---    Hi!  Yeah, I eventually learned how to do that and I'm sending data to the sdram through the f2h_sdram, I'm just not sure how to read it using the C program. First I set the avalon write address as 0x0000_0000 and tried to read the data at 0x0010_0000 which is where the SDRAM starts. This didn't work. I then tried setting the write address as 0x0010_0000 and reading at 0x0010_0000 but this didn't work either. Maybe I'm using the wrong read functions?  I am reading it in the following way:   int fd;  unsigned char *mem;    fd = open("/dev/mem", O_RDWR|O_SYNC);  if (fd < 0) {  perror("open");  exit(EXIT_FAILURE);  }    bridge_map = mmap(0, 4096, PROT_READ|PROT_WRITE, MAP_SHARED,  fd, FPGA2SDRAM_BRIDGE_BASE);  if (bridge_map == MAP_FAILED) {  perror("mmap");  goto cleanup;  }    mem = (unsigned char *) (bridge_map);    value=*mem;  Any help is appreciated. Thank you very much.

[Altera_Forum]

Try writing a simple kernel module and do the access there. This will tell you if you have a hardware issue or a linux issue.