Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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DSP Builder generating non-zero width errors

Altera_Forum
Honored Contributor II
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Running DSP Builder in Simulink. I haven't done anything drastic but now my model aborts when I hit run. The Matlab console is complaining about Java errors and the simulink window grabs a random delay line and complains about 'non-zero width' errors. I've seen the errata, and have tried reloading the file, even reloading Matlab to no avail. 

Any ideas?
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Altera_Forum
Honored Contributor II
569 Views

Turns out the DCFIFOs were messing things up. Two on one page was fine, but multiple subsystems or something screwed it up. Changed to single clock FIFOs and it works fine.

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