Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Design Partitions and Fitter run-time

RPett4
Beginner
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Should implementing design partitions speed up the fitter run time? I have my entire design split into about 9 blocks, all set for "Default" type Design Partition with "Preservation Level" of "final". I made a very small change to an unrelated piece of logic: some small mod to an LED blinking (as a test), and I noticed that the Analysis & Synthesis completed very very fast, but the Fitter process takes just as long. Is this normal?

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Kenny_Tan
Moderator
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What are the Quartus version that you were using? std or pro?
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RPett4
Beginner
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Quartus Prime Version 19.2.0 Build 57 06/24/2019 SJ Pro Edition

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Kenny_Tan
Moderator
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Thanks, if you set the design partition to Final. Quartus will not take any changes into account in your verilog code. Unlike Standard edition.

You need to change back your partition to source first then to final again.

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RPett4
Beginner
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But the part I am changing is NOT in a partition. None of the code related to the 9 partitions changed.

 

You didn't really address my question: Should the fitter run time take the same amount of time as not using partitions?

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Kenny_Tan
Moderator
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There is no measure of time for this, as design partition is not mean for compilation time saving. There is a plan to improve compilation time using the incremental compilation to save time. But the release will be on Q19.3. Please note that this feature implementation is subject to change according to engineering plan.
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