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Altera_Forum
Honored Contributor I
2,363 Views

Does Max10 SCE have no ability to "Select Internal Configuration mode with ERAM" ?

Hello, 

 

I have a question. 

 

I am using a 10M50SCE144C8G chip. (i.e. MAX 10 SCE chip) and Quartus Prime Version 17.0.0 Build 595 (04/25/2017) SJ Lite Edition. 

 

I have my VHDL code loaded into CFM0 and that works fine. 

 

I generated a hex file from my NIOS II code. I added that hex to my build in Qsys (under Memory initialization). 

 

But the problem is when I synthesize the whole thing, I get an error : 

 

"16031 current internal configuration mode does not support memory initialization or rom. 

select internal configuration mode with eram.

 

But... when i go into Device->Device and Pin Options->Configuration->Configuration Mode, i only see 2 options : 

 

1. Single Compressed Image 

2. Single Uncompressed Image  

 

I do not see the option "Single uncompressed image with Memory Initialization" which would make the error above go away. 

 

My question is : 

 

Is there any way to flash my NIOS II code onto a Max 10 SCE chip?  

If I cannot run NIOS II off internal flash, what use are these SCE chips? 

 

Someone mentioned the above issue has been bug fixed in later updated of Quartus 2.  

As in later than version 17.0.0.  

Is that true? 

Is the option "Single uncompressed image with Memory Initialization" for SCE chips shown in later Quartus versions? 

 

Thanks
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8 Replies
Altera_Forum
Honored Contributor I
386 Views

According to the MAX10 documentation, e.g. MAX 10 User Flash Memory User Guide, there's no memory initialization feature with SC types.  

 

 

--- Quote Start ---  

 

If I cannot run NIOS II off internal flash, what use are these SCE chips? 

--- Quote End ---  

 

Obviously many useful applications, but none involving internal NIOS program storage or ROM tables.
Altera_Forum
Honored Contributor I
386 Views

 

--- Quote Start ---  

According to the MAX10 documentation, e.g. MAX 10 User Flash Memory User Guide, there's no memory initialization feature with SC types.  

 

 

Obviously many useful applications, but none involving internal NIOS program storage or ROM tables. 

--- Quote End ---  

 

 

Thanks for the reply. 

 

Is there then no way to run Nios Ii on a Max 10 SC without having the USB Byte Blaster connected to the board to download the program on startup?
Altera_Forum
Honored Contributor I
386 Views

Good question, I imagine the Nios II code can be loaded from an external serial flash.

Altera_Forum
Honored Contributor I
386 Views

 

--- Quote Start ---  

Good question, I imagine the Nios II code can be loaded from an external serial flash. 

--- Quote End ---  

 

 

Good grief.  

What is the purpose of having the "benefits" of a FPGA with internal flash if i have to resort to using external flash. 

 

I was thinking NIOS II could be loaded from internal flash into internal RAM of the FPGA. 

 

Surely there must be some way to do this. 

Surely Altera did not leave MAX 10 SC users out to dry. 

 

I'm going to do some research on this issue as there must be a way.  

I'm sure I'm not the first guy here who's tried to use a MAX 10 SC and run into this issue.
Altera_Forum
Honored Contributor I
386 Views

I've used 10M02SC in several projects and appreciate the compactness. All designs get along without RAM initialization, however.

Altera_Forum
Honored Contributor I
386 Views

 

--- Quote Start ---  

I've used 10M02SC in several projects and appreciate the compactness. All designs get along without RAM initialization, however. 

--- Quote End ---  

 

 

 

The 10M02 is the smallest of the lot. 

 

I'm using the largest - the 10M50. The SC (compact) version of the chip. 

 

I would have thought there is more than enough resources in the chip to host a NIOS II implementation.  

 

I'm sure it must be possible. It would be absurd if it was not. 

 

I just need to figure out how/where to flash that hex of the NIOS II program onto the chip's internal flash. 

 

Can't seem to find any clear documentation on how to do this online.
Altera_Forum
Honored Contributor I
386 Views

I see it like this: The documentation states (more or less clearly) that SC version doesn't provide configuration schemes with RAM initialization. I don't think that there's an undocumented way to do it though. I would be glad if somebody can correct me in this regard. 

 

10M50 has 16 kByte of UFM. It might be utilized to initialize NIOS code RAM by user logic.
Altera_Forum
Honored Contributor I
386 Views

 

--- Quote Start ---  

I see it like this: The documentation states (more or less clearly) that SC version doesn't provide configuration schemes with RAM initialization. I don't think that there's an undocumented way to do it though. I would be glad if somebody can correct me in this regard. 

 

10M50 has 16 kByte of UFM. It might be utilized to initialize NIOS code RAM by user logic. 

--- Quote End ---  

 

 

 

Application note from Altera AN730 describes the process of loading a NIOS program into flash for a "compact" MAX 10, I believe. 

 

Option 2 in that document is the option I am following.  

 

I'm still having difficulty getting it running ... but i think this is the way. i.e the program is put into a FLASH qsys module and then loaded into a RAM qsys module on reset (i.e. startup).  

 

I wish things were simpler and Altera would simply put that option to Initialize the HEX file in Quartus for MAX 10 SC (i.e. compact MAX 10 chips).  

 

Why it has to be so confusing for the "SC" chips is beyond me.  

 

I'm continuing to try and if i meet with any success, I shall report back. 

 

If you run into anything that might help me, do let me know.
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