Dynamic read and write in the registors on FPGA

[Altera_Forum]

Hi All, 

 I am working on straix iv GX transceiever development kit. Is there any way to read and write on registors on FPGA using USB or Jtag port? Thanks.

[Altera_Forum]

if you insert a IP core for either USB or JTAG, then theres no problem.

[Altera_Forum]

Hi, 

 Thanks for reply.  Do you mean the core generated by quartus MegaWizard Plug-In Manager?

[Altera_Forum]

I think for USB you need to write your own. I did. 

For JTAG you could use the "SignalTap II Embedded Logic Analyzer[/B][/B]" functionality. Just search altera.com for it.

[Altera_Forum]

In-System Updating of Memory and Constants may be of use: 

 http://www.altera.com/literature/hb/qts/qts_qii53012.pdf