I'm trying to implement 2 out of 3 Ethernet ports on Arria 10 Kit (using Quartus prime pro 18.1).
On the platform designer IP editor for the HPS IP (altera_arria10_hps) I get the following options (under: Pin Mux ans Peripherals>IP Selection) - see attached capture below, ip_1:
EMAC A: (if/phy)
EMAC B: (if/phy)
EMAC C: (if/phy)
and under: Pin Mux ans Peripherals > Advanced FPGA Placement - see attached capture below, ip_2:
EMAC 0 Interface: (if/PHY)
EMAC 1 Interface: (if/PHY)
EMAC 2 Interface: (if/PHY)
what is the difference between these two option settings?
My apologize for the late reply. We were working on few debugging steps to make sure there is no bug in this GUI, however, there might be a bug where the two options menu are not reflecting each other. This is not confirmed yet.
IP selection settings can be seen on Advanced FPGA settings tab, however, the reverse direction cannot be seen reflected. And here is the bug possibility.
You can refer to the IP selection configurations. Once you are done, press the Apply Selection button.
what seems to work without messing up the pin placement is: