Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16815 Discussions

Embedded Timing Constraints

amildm
Valued Contributor I
‎10-15-2022 10:35 AM
404 Views

Hi All,

 

What are the Embedded Timing Constraints? How to use them? Could they be defined by designers as well?

 

Thank you!

0 Kudos

Link Copied

2 Replies
Nurina
Employee
‎10-16-2022 08:54 PM
377 Views

Hello,


Are you referring to embedded timing constraints in HDL code? I believe this has been answered in another thread you've posted: https://community.intel.com/t5/Intel-Quartus-Prime-Software/SDC-directives-in-HDL/m-p/1422441#M75617


Please let me know if you have additional questions.


Regards,

Nurina


0 Kudos
Copy link
Nurina
Employee
‎10-19-2022 06:28 PM
348 Views

Hello,


We do not receive any response from you on the previous question/reply/answer provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution, give Kudos and rate 10/10 survey


Regards,

Nurina


0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.