Hi, I'm starting my adventure with FPGA and at first I have a problem, I've searched everything and can not find the answer to my problem.At compile I get an error: "Error (12006): Node instance "BUS_MUX" instantiates undefined entity "BusMultiplexer". Make sure that the required user library paths are specified correctly. If the project contains EDIF Input Files (.edf), make sure that you specified the EDA synthesis tool settings correctly. Otherwise, define the specified entity or change the calling entity. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number."
library IEEE; use IEEE.STD_LOGIC_1164.all; entity BusMultiplexerTop is Port ( sw: in STD_LOGIC_VECTOR ( 5 downto 0); choice: in STD_LOGIC; led: out STD_LOGIC_VECTOR ( 2 downto 0)); end BusMultiplexerTop; architecture Behave of BusMultiplexerTop is component BusMultiplexer Port (A: in STD_LOGIC_VECTOR (2 downto 0); B: in STD_LOGIC_VECTOR (2 downto 0); choice: in STD_LOGIC; Y: out STD_LOGIC_VECTOR (2 downto 0)); end component; begin BUS_MUX : BusMultiplexer port map ( A => sw(2 downto 0), B => sw(5 downto 3), choice => choice, Y => led ); end Behave;Please help me