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Hi,
I'm getting this error anytime I want to program two of our cards (out of 10): error (209015): can't configure device. expected jtag id code 0x025030dd for device 1, but found jtag id code 0x00000000. The FPGA is a ARRIA II GX EP2AGX125EF29C5. One card has programmed only once, just for the production test, and the second has been working but during debugging with SignalTap II at some point had no more JTAG connection and from this point on, no possibility of programming. According to Quartus Help for this Error: cause: you directed the programmer to configure the specified device. however, the programmer cannot successfully configure the device because the jtag id code for the specified target device does not match any of the valid id codes for the device. this problem occurs when the target device's location on the circuit board does not match the device's location in the device chain in a chain description file (.cdf), as displayed in the programmer window. action: make sure the target device's location on the circuit board matches the device's location in the device chain as displayed in the programmer window. Well I'm 100% sure that it is right! digging around I found: http://www.altera.com/support/kdb/solutions/rd04202010_43.html This information is for the Cyclone III family... and a follow up an entry in the forum and it points to a solution: http://www.alteraforum.com/forum/archive/index.php/t-31729.html Well, no luck. I have kept nCONFIG low and then issued factory command using the JTAG and I'll still getting the same result, error! I kept digging and I found in this doc: http://www.altera.com/literature/an/an556.pdf, "Security Mode Modification" a table were it's explained that the key_verify JTAG instruction allows you to read out the information on the security features that are enabled on the chip. This instruction scans out associated bit values. I though maybe this obscure tampering bit has been activated during JTAG operation. (I'm quite skeptical about it but...) Well the result is 0x20 in both cards. If I check the table 8 of this document, the value 0x20 (10 000) doesn't correspond to any of the Security Mode! I have to interpret that 10 000 is 00 0001 and then somehow a Volatile Key has ended up in our FPGA (more skeptical). The only solution for this would be FACTORY command , according to the doc "IEEE 1149.1 (JTAG) Boundary-Scan Testing for the Cyclone III Device Family" http://www.altera.com/literature/hb/cyc3/cyc3_ciii51014.pdf factory: enables access to all other jtag instructions (other than bypass, sample/preload and extest instructions, which are supported upon power up). this instruction also clears the device configuration data and advanced encryption standard (aes) volatile key. Aside all this trial and error, I'm wondering how is possible that the FPGA can be detected in the JTAG chain with the correct JTAG ID when I open the JTAG: JTAG: USB-Blaster [8-2], FPGA: @1: EP2AGX125 (0x025030DD) and then when programming Quartus Programmer(actually jtagd) says: Error (209015): Can't configure device. Expected JTAG ID code 0x025030DD for device 1, but found JTAG ID code 0x00000000. well, I don't have more ideas to try, more docs to read and I need to fix this problem. Could you help me? Thanks! C. P.S. I have already check that all the signal are electrically correcLink Copied
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Hi bradomyn,
Check that all the in/out of your top fpga have a pin location assigned. Sometimes, this error could occur when there are some in/ou without a pin location (pin planner or qsf). regards,- Mark as New
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I do see this is an old thread, wants to tell what I do see on a BeMicro CV A9 board (Cyclone V A9 FPGA)
Error (209015): Can't configure device. Expected JTAG ID code 0x02B140DD for device 1, but found JTAG ID code 0xFFFFFFFF. It do have a build in USB blaster and does works normal fine with different test I have done. Now I did port a big project from another dev board Cyclone V GT board and it all compile fine When programming the BeMicro board I do get the error at 99% but it still work fine with smaller project. I then had look into the schematic for the PSU and it's clear the there are a much smalle PSU on the beMicroboard only 4 amps for the core where the V GT borad do have like 7Amps. also on the beMicroboard there are an Led10 which will show all PSU are fine...it does turn off shortly on 99% so I'm pretty sure that the big project (all as pipline) just draw to much current and the FPGA / Blaster loose all data just downloaded :-(
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