Error 332000 when using DCFIFOs in Qsys during build

[Altera_Forum]

I received this error message in Quartus Prime Lite 16.1 when attempting to add a dual-clock FIFO to Qsys on a DE2i-150 example project. I tested this with the DE2i-150 PCI-E Fundamental example project and substituted their Qsys project for another one called 'system' (see attachment for the Qsys file). The error seemed to be dependent on the DCFIFO being present. When I removed the DCFIFO the build started working. 

 Is there any way to report this as a bug? Compiling the same project with Quartus 15.0 doesn't result in an error. So this is a regression. I did notice that the SDC constraint file that is referenced in the error message is not generated in 15.0.  Thanks, DJ   Error (332000): ERROR: Quartus Prime Tcl package "::quartus::design" is only available for use in the following executables: qacv qpro qpro_sh quartus quartus_cdb quartus_fit quartus_map quartus_pow quartus_sh quartus_sta quartus_syn while executing "load_package design" (procedure "altera_private_get_entity_instances::find_instances_of_entit..." line 2) invoked from within "altera_private_get_entity_instances::find_instances_of_entity $entity_name $nowarn" (procedure "get_entity_instances_internal" line 72) invoked from within "get_entity_instances_internal 0 system_sample_fifo" invoked from within "get_entity_instances $entity_name" (procedure "apply_sdc_pre_dcfifo" line 3) invoked from within "apply_sdc_pre_dcfifo system_sample_fifo" (file "../../fpga/ip/altera/system/synthesis/submodules/system_sample_fifo.sdc" line 82

[Altera_Forum]

Hi DJ, 

 I am getting the same compile error for a different PCIe related DE2i-150 design in Quartus 17.0. Did you ever find a resolution to this? In your case did you try just deleting system_sample_fifo.sdc ?  Regards, Aidan

[Altera_Forum]

Hi DJ/Aidan, 

 I try to run the synthesis system.zip above in q17.0.2std version, I do not get any error showing up in cyclone IV.  can you try using this version? If you still see error, can reattached the .qsys files?  Thanks, Best regards, Kentan (This message was posted on behalf of Intel Corporation)

[Altera_Forum]

Hi Kentan, 

 Thank you for your response. I solved this by building in Quartus 15.0 as DJ mentioned above.   Regards, Aidan

[Altera_Forum]

Hello, 

Is anyone found the cause of this bug and how to solve it? I'm facing the same issue and I tried version v17, v17.1 and v18. Always the same message occur.  Thanks.  Raph