Error: Cell <name> fed by 5 non-global control signals ...

[Altera_Forum]

I get several (189) errors of the same type for my fpga fabric (vhdl modules): 

 cell <name> fed by 5 non-global control signals -- only 4 control signals may be non-global   My problem is that I cannot use Plls in my design because of a problem on the board.  Is there a way to turn my non-global high fan-out signals into global ones?  I already tried to turn in "Assignment Editor" to assign them as "Auto global clock" but there was no change!  I appreciate your help!

[Altera_Forum]

What you can do is go into assignment editor, place the Net in the "To" field, set Assignment Name to "Global Signal", and Value as "Global" or "Regional" or whatever you have available to your specific fpga family.

[Altera_Forum]

--- Quote Start ---  What you can do is go into assignment editor, place the Net in the "To" field, set Assignment Name to "Global Signal", and Value as "Global" or "Regional" or whatever you have available to your specific fpga family.  --- Quote End ---    Thanks for your suggestion.  I have set the Assignment Name to "Global Signal" and the only option ("Value") selectable is "Global Clock". But I still get the same errors.   By the way, I use Cyclone IV and Quartus 11.0 SP1.

[Altera_Forum]

What's your sensitivity list? If it's a synchronous process, you should only have the clock and maybe an async reset. I've seen this error with code that had all of the signals in its sensitivity list. Either that or try globalling the clock

[Altera_Forum]

Ok, the problem is solved now. :cool: 

I had to set the Assignment Name to "Global Signal" and the only option ("Value") selectable is "Global Clock" for my system clock and my reset. (as suggested by jderrick).   ... and I had to remove the input buffers for my system clock and my reset !!!  Thank you for your help!