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The error is related to a real value in the VCD file :
line 2440 : r2.1e-09 signal1
Older Versions did not show this error.
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Hi,
May I know how was the VCD generated in first place ?
In order to open a waveform using VCD, you need to convert VCD to WLF first.
Refer to KDB
Thanks,
Arslan
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Hi,
Thanks for sharing the VCD file.
Looking at your .vcd file
line 14 $var real 1 aaaal VIO $end It seems like bit width is set to 1.
$var type bitwidth id name
Try to increase the bit width to fix the issue.
Thanks,
Arslan
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Hi MUsman,
thanks for your reply ...
Unfortunately the SystemC VCD writer is writing the file in this way. Older Version of Modelsim did not have this Problem.
Best regards
GPK
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Hi,
Per my understanding it is a problem from VCD writer side not Modelsim Intel side.
Thanks,
Arslan
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Hi Arslan,
I found a solution for may Problem.
$var real 1 aaaal test $end
When I delete the width defintion of the real variable it works fine. Question is why ?
Best regards
GPK
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