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Hello,
I'm encountering an error while running ".tcl" file through system console in Quartus Prime.
I'm trying to verify the signal integrity of my data using BER.
The error message indicates that the "data_pattern_generator" is not opening correctly.
I would like to know if I made any mistakes causing this error, whether it is a hardware of software issue, and if there are any specific step I need to take to you this function.
additionally, please let me know if there is any additional information I should provide to help identify the problem.
I am using a Stratix V FPGA and Quartus version 22.1
Below is error status in system console window, so please refer to it.
(If you need to verify my tcl file, please let me know and I'll attach it)
Thank you for your help in advance.
Message :
data_pattern_generator_is_generating: /devices/5SGXEA7H(1|2|2ES|3|3ES)..@1#USB-0(link)/JTAG/sld_hub.node_0.master/data_pattern_generator_0.csr_slave/driver is not an open data_pattern_generator service.
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Hi,
Check out this example design https://community.intel.com/t5/FPGA-Wiki/Cyclone-V-ALTLVDS-Design-Example/ta-p/735385 probably can help you out.
I think most likely you need below:
# Open service path
open_service master $mm
Thanks,
Best Regards,
Sheng
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Hi,
Check out this example design https://community.intel.com/t5/FPGA-Wiki/Cyclone-V-ALTLVDS-Design-Example/ta-p/735385 probably can help you out.
I think most likely you need below:
# Open service path
open_service master $mm
Thanks,
Best Regards,
Sheng
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Oh thank you for your advise.
I'll refer to it and try again as you said.
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Hi,
Sure. Let me know if any further update or concern.
Thanks,
Best Regards,
Sheng
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Hi,
Any further update or concern? Does the problem being resolved?
Thanks,
Best Regards,
Sheng
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I'm trying to troubleshoot the issue, but it's not going well. I think it's going to take some time,
I'll try it and if I have any questions, I'll ask them as a separate question.
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