Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)

Error in Quartus II 5.1

Altera_Forum
Honored Contributor II
1,146 Views

How to deal with this kind of error: 

Error: Actual width (8) of port "oDATA" on instance "sopc_system:SOPC_component_inst|input_user_logic:the_input_user_logic|shiftreg_reducer:shiftreg_reducer_inst" is not compatible with the formal port width (32) declared by the instantiated entity
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
444 Views

If this error is not some thing that you authored, but is as a result of something that the SoPC is automatically creating, then please file an SR on the MySupport section of the Altera Support pages. 

 

If this is a result of something that you are connecting to a component on the boundry of an SoPC system in a larger design, then you should look at the width of the declared signals at that boundary.
0 Kudos
Altera_Forum
Honored Contributor II
444 Views

Thanks for your reply. I check the component port. One data width definition is different.

0 Kudos
Reply