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Error nios2-terminal

Altera_Forum
Honored Contributor II
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Hi all, 

I request your help because i have an error with my FPGA RedCore_EP2C8_V2. 

 

I want to build the simple Hello World on NIOS II IDE the Build works but when i want to launch the RUN as NIOS II Hardware i have this error message: 

 

 

--- Quote Start ---  

 

Unable to launch C:/Altera90/nios2eds/bin/nios2-terminal.sh 

 

--- Quote End ---  

 

--- Quote Start ---  

 

nios 2-terminal: Can't open Uart no such file or directory 

 

--- Quote End ---  

I use an USB Blaster Cable and i think i have flashed a correct ptf file. 

 

Please anyone can help me for explain how to solve it ? 

 

Thanks !
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Altera_Forum
Honored Contributor II
1,703 Views

Is there a jtag uart component in your sopc project?

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Altera_Forum
Honored Contributor II
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ah no there is only the UART RS232 Serial Port. 

maybe i should add the USB Blaster , but i can't find it in the list. 

it's the : JTAG to Avalon Master Bridge ?
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Altera_Forum
Honored Contributor II
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No it is called JTAG Uart

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Altera_Forum
Honored Contributor II
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OK. 

today i have installed the Quartus II V11 and restarted to the beginning. 

 

Now i haven't any error when i compile my Nios II Hello World project and in the Run as Nios II Hardware all seems to be fine.: 

 

Downloaded 43KB in 2.1s (20.4KB/s) Verifying 00800020 ( 0%) Verified OK Starting processor at address 0x008001B4  

 

 

but i can't see in the console the Hello World Text maybe i have missed something... 

 

i have tested to launch my project in Debug as and it take me this message: 

 

.gdbinit: No such file or directory. Reading symbols from C:/Users/X-death/Documents/FPGA/SOPC/software/Hello_World_EP2C8/Hello_World_EP2C8.elf...done. Current language: auto The current source language is "auto; currently asm".  

 

if anyone can tell me where is my error ?
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Altera_Forum
Honored Contributor II
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In your BSP/system library make sure stdout is set to whatever UART you are using. This will make sure printf() directs the text to the correct output device. 

 

To test the terminal independent of the IDE/Eclipse tools you can use the Nios II command shell and type this: "nios2-terminal"
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Altera_Forum
Honored Contributor II
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ok i have find this in BSP System.h: 

but nothing about stdout ( excuse i am a beginner) 

/* * jtag_uart_0 configuration * */ # define ALT_MODULE_CLASS_jtag_uart_0 altera_avalon_jtag_uart# define JTAG_UART_0_BASE 0x10# define JTAG_UART_0_IRQ 0# define JTAG_UART_0_IRQ_INTERRUPT_CONTROLLER_ID 0# define JTAG_UART_0_NAME "/dev/jtag_uart_0"# define JTAG_UART_0_READ_DEPTH 64# define JTAG_UART_0_READ_THRESHOLD 8# define JTAG_UART_0_SPAN 8# define JTAG_UART_0_TYPE "altera_avalon_jtag_uart"# define JTAG_UART_0_WRITE_DEPTH 64# define JTAG_UART_0_WRITE_THRESHOLD 8 and the shell tells me this : 

 

There is no JTAG UARTs available with match the --devices and --instence option you provided... 

 

but in my sopc i have added the JTAG uart and Qsys connect it before i create the project...
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Altera_Forum
Honored Contributor II
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Open the Nios II command line shell and type "jtagconfig -n" and post what it returns.

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Altera_Forum
Honored Contributor II
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Altera_Forum
Honored Contributor II
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According to that you have a Nios II debug module but no JTAG UART in the hardware image you programmed the FPGA with. Are you sure you don't have an old image in flash that is getting programmed after you configure the FPGA? This often happens with dev kits that have a active low reconfiguration request pin which gets pulled low after you program the FPGA (FPGA is programmed, pin is pulled low, external logic re-programs the FPGA with whatever is in flash).

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