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# ** Error: (vsim-3036) Instantiation depth of '/fulladd_TB/dut' is 222. Assuming recursive instantiation. # Time: 0 ns Iteration: 0 Instance: /fulladd_TB/dut File: C:/Users/win 10/Desktop/codes/bitt.v # ** Error: (vsim-3036) Instantiation depth

ABV00
Beginner
890 Views

am new to model sim when am do simulation am getting error loading design please give solution for this

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1 Reply
RichardTanSY_Intel
853 Views

This could be due to the module name and the instance name are the same. Example:

module counter_tb;

 reg clk, reset, enable; 

 wire [3:0] count; 

 

 counter_tb U0 ( 

 .clk  (clk), 

 .reset (reset), 

 .enable (enable), 

 .count (count) 

 ); 

 

endmodule 

 

Try rename one of them (counter_tb) into a different name.

By sharing your code, then I can further debug and provide a better answer.

 

p.s. Don’t forget to Reply, and Select the Best Answer. :)

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