Explicit RTL to place ALM in LUT-register ("three register") mode?

[Altera_Forum]

Hi, 

 Stratix IV allows an ALM to be used in 3-register mode. The two combinational LUTs are used to create the 3rd register.  Has anyone synthesized these in Quartus II? Would love to know how to force Quartus to pack into this ALM mode. I'm trying to maximize register count in my device.  THanks, Pete

[Altera_Forum]

I don't think there's a way to turn this on and off. As synthesis(or maybe the packer, which occurs early in the fitter) begins to run out of registers, it will convert them to ALUT Regs. In general, you would always want to use a dedicated register first.

[Altera_Forum]

Have you seen the fitter implement 3-register ALMs when the fitter starts running out of registers? Just curious if the tool actually supports this mode. So far I haven't seen it happen, even in tight LogicLock regions.

[Altera_Forum]

Yep, on a few designs. Most designs don't use any, and a few use a small percentage. I do have one right now that's putting about 20% of the registers into REG_LUTs, although I'm not completely sure why.

[Altera_Forum]

Well that's good news. I would still like to know how to explicitly force logic to use the 3-register ALM mode. I would expect the fitter wouldn't have to work as hard to fit other stuff then. I don't know if ALMs in 3-register mode create slower circuits but I would only use it for storage of configuration parameters so it doesn't need to be fast.

[Altera_Forum]

It's supposed to choose registers that are slower anyway, but I would like more control too. I haven't really had any problems, but am concerned what to do when that day comes... : )