Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)

FFT_IP时序问题

pp
New Contributor I
525 Views

各位前辈:

    我的软件版本是 quartus 18.1 pro专业版,使用的是FFT IP核

    下面是我对IP核界面的配置选项

pp_0-1609726278420.png

pp_1-1609726302039.png

使用该配置,并对该IP进行了modlesim仿真,仿真的时序图如下

pp_2-1609726418348.png

pp_3-1609726465224.png

看了仿真时序图后,我有几个问题:

1. 为什么IP核的输出会有间断的红线出现?

2.输出信号source_error 为什么会输出2'b11,source_sop为什么会乱跳?

3. source_vaild不能随时给出高电平吗? 而是要sink_vaild和sink_ready都结束后才能给吗?

 

请各位前辈,帮帮我,我卡了两天了,求助

 

     

0 Kudos
1 Reply
CheePin_C_Intel
Employee
514 Views

Hi,


Just to check with you if this is a similar case to the other opened by you which I have shared a simulation example from Q17.0Std? If not, please feel free to let me know. Thank you.


0 Kudos
Reply