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15310 Discussions

FLEXlm software error: System clock has been set back

JSBruno
Beginner
543 Views

I have a Fixed Node License from Intel University Program.  I successfully added it to Quartus Prime Standard Edition 18.1 and the NIC is matching.

However I get the following error message when I try to compile my design:

 

Info (12021): Found 1 design units, including 1 entities, in source file v/lpm_10m_nco/synthesis/lpm_10m_nco.v

Info (12023): Found entity 1: lpm_10M_nco

Warning (292000): FLEXlm software error: System clock has been set back. Feature:    6AF7_0014 License path: C:\intelFPGA\license.dat; FlexNet Licensing error:-88,309 For further information, refer to the FlexNet Licensing documentation, available at "www.flexerasoftware.com"..

Warning (292000): FLEXlm software error: System clock has been set back. Feature:    6AF7_0014 License path: C:\intelFPGA\license.dat; FlexNet Licensing error:-88,309 For further information, refer to the FlexNet Licensing documentation, available at "www.flexerasoftware.com"..

Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/Laburo/DiComLab/AlteraDocs/DE-10-SE_Terasic/DCC/DE10_Standard_DCC/v/lpm_10M_nco/synthesis/submodules/asj_nco_madx_cen.v" -- current license file does not contain a valid license for encrypted file

 

Info (12021): Found 0 design units, including 0 entities, in source file v/lpm_10m_nco/synthesis/submodules/asj_nco_madx_cen.v

Warning (292000): FLEXlm software error: System clock has been set back. Feature:    6AF7_0014 License path: C:\intelFPGA\license.dat; FlexNet Licensing error:-88,309 For further information, refer to the FlexNet Licensing documentation, available at "www.flexerasoftware.com"..

Warning (292000): FLEXlm software error: System clock has been set back. Feature:    6AF7_0014 License path: C:\intelFPGA\license.dat; FlexNet Licensing error:-88,309 For further information, refer to the FlexNet Licensing documentation, available at "www.flexerasoftware.com"..

Error (10003): Can't open encrypted VHDL or Verilog HDL file "D:/Laburo/DiComLab/AlteraDocs/DE-10-SE_Terasic/DCC/DE10_Standard_DCC/v/lpm_10M_nco/synthesis/submodules/asj_nco_mady_cen.v" -- current license file does not contain a valid license for encrypted file

........

 

 

 

0 Kudos
3 Replies
AR_A_Intel
Employee
448 Views

Hello

 

Welcome to INTEL forum. To narrow down this issue, can you please provide me the latest of the following?

 

1) license.dat file

2) assembler report .asm.rpt file

 

You can also reply/attach your file in private message.

JSBruno
Beginner
448 Views

Hello,

I can't generate the report that you request because the design cannot be synthesized. When trying to assemble the project the following error message appears:

Error (120001): Run Analysis and Synthesis (quartus_map) with top-level entity name "DE10_Standard_DCC" before running the Assembler (quartus_asm)

I attach the license file.

Thanks,

AR_A_Intel
Employee
448 Views

Hi Sir

We PM you a private message. Thanks

Reply