if i have a function that calculate for example the square root of an integer. This function is simulated by using Modelsim, and the time required to receive the output result is approximately 1 ns (as an example).
is that mean, that the calculation time needs to implement this function in FPGA is also equal to 1 ns?
In other word, the time needs to get the output result after the input value is gave to this function.
PS: i am not using a clock in the function.
Thanks in advance.
Assuming that you are using the timing simulation, then yes. In timing simulation, the logical functionality of the design is tested in the presence of delays. Any change in logic state of a wire will take as much time as it would on a real device.