Community
cancel
Showing results for 
Search instead for 
Did you mean: 
sli30
Novice
884 Views

Fitting is still in process, should I stop (Arria 10)?

Dear all,

 

The compiler takes more than 30 hours. The last several lines in the "quartus_sh_compile.log" shows the information below:

--------------------------------------------------------------------------------

Info (170195): Router estimated average interconnect usage is 32% of the available device resources

   Info (170196): Router estimated peak interconnect usage is 91% of the available device resources in the region that extends from location X130_Y165 to location X141_Y176

Warning (16684): The router is trying to resolve an exceedingly large amount of congestion. At the moment, it predicts long routing run time and/or significant setup or hold timing failures. Congestion details can be found in the Chip Planner.

Info (188005): Design requires adding a large amount of routing delay for some signals to meet hold time requirements, and there is an excessive demand for the available routing resources. The Fitter is reducing the routing delays of some signals to help the routing algorithm converge, but doing so may cause hold time failures. For more information, refer to the "Estimated Delay Added for Hold Timing" section in the Fitter report.

Info (170236): Routing optimizations have been running for 1 hour(s)

   Info (170242): 355882 out of 468870 signals have been routed.

   Info (170238): 129808 interconnect resources are used by multiple signals.

Info (170236): Routing optimizations have been running for 2 hour(s)

   Info (170242): 377385 out of 468870 signals have been routed.

   Info (170238): 105001 interconnect resources are used by multiple signals.

Info (170236): Routing optimizations have been running for 3 hour(s)

   Info (170242): 391141 out of 468870 signals have been routed.

   Info (170238): 89615 interconnect resources are used by multiple signals.

Info (170236): Routing optimizations have been running for 4 hour(s)

   Info (170242): 398317 out of 468870 signals have been routed.

   Info (170238): 80883 interconnect resources are used by multiple signals.

Info (170236): Routing optimizations have been running for 5 hour(s)

   Info (170242): 401205 out of 468870 signals have been routed.

   Info (170238): 77179 interconnect resources are used by multiple signals.

Info (170236): Routing optimizations have been running for 6 hour(s)

   Info (170242): 406244 out of 468870 signals have been routed.

   Info (170238): 70778 interconnect resources are used by multiple signals.

Info (170236): Routing optimizations have been running for 7 hour(s)

   Info (170242): 408943 out of 468870 signals have been routed.

   Info (170238): 67450 interconnect resources are used by multiple signals.

Info (170236): Routing optimizations have been running for 8 hour(s)

   Info (170242): 412015 out of 468870 signals have been routed.

   Info (170238): 62791 interconnect resources are used by multiple signals.

Info (170236): Routing optimizations have been running for 9 hour(s)

   Info (170242): 415109 out of 468870 signals have been routed.

   Info (170238): 60032 interconnect resources are used by multiple signals.

Info (170236): Routing optimizations have been running for 10 hour(s)

   Info (170242): 419591 out of 468870 signals have been routed.

   Info (170238): 55202 interconnect resources are used by multiple signals.

Info (170236): Routing optimizations have been running for 11 hour(s)

   Info (170242): 420949 out of 468870 signals have been routed.

   Info (170238): 53029 interconnect resources are used by multiple signals.

Info (170236): Routing optimizations have been running for 12 hour(s)

   Info (170242): 423001 out of 468870 signals have been routed.

   Info (170238): 49307 interconnect resources are used by multiple signals.

Info (170236): Routing optimizations have been running for 14 hour(s)

   Info (170242): 425642 out of 468870 signals have been routed.

-----------------------------------------------------------------------------------

and the estimated resources are:

+--------------------------------------------------------------------+

; Estimated Resource Usage Summary                                  ;

+----------------------------------------+---------------------------+

; Resource                              + Usage                    ;

+----------------------------------------+---------------------------+

; Logic utilization                     ;  91%                    ;

; ALUTs                                 ;  54%                    ;

; Dedicated logic registers             ;  42%                    ;

; Memory blocks                         ;  65%                    ;

; DSP blocks                            ;  25%                    ;

+----------------------------------------+---------------------------;

 

Should I waiting for longer time or stop it? Many thanks.

0 Kudos
2 Replies
DBay
New Contributor I
111 Views

Has it produced any errors that scrolled by? I've had my arria 10 project crash so many times I lost count. Sometimes even after 5 hours of compile. Unless your running on a slow or low memory machine, I would think it is locked up after 30 hours.

On the other hand, older versions could fit 80-90% filled chips in a timely manor. I have little faith that this version can do the same at 90%, which your printout seems to indicate. It may be that it just can't find a fit given the heavy usage.

Unless you want to wait longer, I would kill it and try to figure out how to reduce the usage. Either by changing your coding or change the compiler instructions to try to reduce the size.

Do you need a faster computer or more memory? You probably need 64GB of memory. I'm using 30GB on mine and it isn't the biggest Arria10 and it is only 70%.

HRZ
Valued Contributor II
111 Views

Your design clearly has routing congestion which makes it very difficult for the router to successfully route. In my experience, Arria 10 designs that take more than 24 hours to place and route either never finish routing, or if they do, the operating frequency is very low (sub 100 MHz). You probably need to change your design strategy/reduce your logic usage.

Reply