HDMI IP not generating example

[MATRIX7878]

Hello,

     I am trying to generate an HDMI TX/RX (if need be one at a time, so be it) example from the HDMI Intel FPGA IP.  I run the generate example, but after around 15-20 minutes, I get met with errors.  I am attaching the setup and the errors.  Any help would be appreciated.

Thank you,

Drew

[MATRIX7878]

Hello,

     Is there anyone here that can help me?  Or did I post in the wrong thread?

Thank you,

Drew

[ZH_Intel]

Hi Drew,

Thank you for reaching out.

Apologize for the delayed response as we encounter some technical difficulty.

Just to let you know that Intel has received your support request and currently we are confirming the details with our internal team.

I shall come back to you with findings.

Thank you for your patience.

Best Regards,

ZH_Intel

[MATRIX7878]

Hello,

     Ah, that is why a lot of my forums have not been replied to.  Good to know.

     Thank you.  Hopefully they'll know soon.

Drew

[ZH_Intel]

Hi Drew,

Thank you for your patience.

We have check the design example generation, and we could not replicate your error from our end.

We found no issue when generating the design example.

Q1. May I know which version of Quartus you are using?

Q2. May I know which operating system that you are running your Quartus software on?

Please be inform that there is a known bug for Hdmi design example VHDL variant for Quartus Version 23.2, You may refer to below KDB for more information and workaround.

FPGA Knowledge Base Articles - Why do I see Error(13879) when compiling the HDMI Intel® FPGA IP Design Example VHDL variant? 

Do note that when you select custom development kit under the design example tab, you will need to make some modification in order to make the design example work. (assign pin assignment in qsf file).

Attached is my generated design example (Quartus version 23.3) for your reference.

Hope this answers your question.

Best Regards,

ZH_Intel

[MATRIX7878]

Hello,

     I am using Quartus 23.2.  That is the problem.  I should upgrade to fix the error.  I am using Windows 11.  I should be able to create the files then.  Could I also have run out of disk space?  I do not know if the example goes through the whole synthesis and fitter process, but that might also explain an error.

Thank you,

Drew

[ZH_Intel]

Hi Drew,

Thank you for your reply.

We suggest you to use the latest version of Quartus which is 23.3 or use the workaround stated in the article below:

FPGA Knowledge Base Articles - Why do I see Error(13879) when compiling the HDMI Intel® FPGA IP Design Example VHDL variant? 

Regarding to your question, Could I also have run out of disk space?

Yes disk space could be one of the factor that could cause error when generating a design example.

Hope this answers your question.

Do you still have further inquiries on this issue?

Is there anything else I can help you with regards to this case?

If there is no further inquiries, I will transition this thread to community support. 

Thank you.

Best Regards,

ZH_Intel

[MATRIX7878]

Hello,

     The most logical answer is actually that I ran out of disk space.  I only had ~12 GB left and the example probably needed more.  That answers the question.

Thank you,

Drew

[ZH_Intel]

Hi Drew,

Thank you for your reply.

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.

Thank you.

Best Regards,

ZH_Intel