Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Has anyone had DSP inference problems in Quartus Prime Pro 19.1?

samba4
Beginner
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I have a design that uses a lot of DSPs in an Arria 10 device. This device has 156 DSPs available but I could use more. In version 18.1 of Prime, it compiles fine. I took the same design and ran it with version 19.1 of Prime and it has an error:

Error(184035): Design uses 160 DSP blocks, but only 156 DSP blocks are available in the device.

I tried to manually set the synthesis assignment to use only 156 DSP max (it defaults to unlimited) but it still doesn’t clear this error. The assignment used to be set to unlimited (default) and Quartus 18.1 would figure it out automatically, putting some of the math functions in the fabric.

thanks,

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CheePin_C_Intel
Employee
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Hi Sam, As I understand it, you observe different in compilation observation between Q18.1 vs 19.1. Your design is passing compilation in 18.1 but seems to fail in 19.1. To facilitate further debugging, would you mind to share with me a simple test design which could replicate your observation? Please share with me also the specific assignment that you use to set the DSP limit. Please let me know if there is any concern. Thank you. Best regards, Chee Pin
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CheePin_C_Intel
Employee
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Hi Sam, Just would like to follow up with you on this. thank you.
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