Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16596 Discussions

Help - Creating alarm clock with modulo counter - System verilog

Altera_Forum
Honored Contributor II
1,766 Views

I am trying to create an alarm clock using a Terasic CycloneV fpga. I need to be able to set the time and an alarm. Right now I'm unable to get the clock to reset at 24 hours. I have attached the modulo counter module as a .txt. Can anyone help with the statement to reset at 24 hours? 

 

 

 

module testFiveBitCounter(input logic CLOCK_50, input logic KEY, input logic SW, output logic LEDR, output regHEX0, output regHEX1, output regHEX2, output regHEX3, output regHEX4, output regHEX5); logic oneSecondEnable, tenSecondEnable, oneMinuteEnable, tenMinuteEnable, oneHourEnable, tenHourEnable, temp = 1'b0; logic countSecOnes; logic countSecTens; logic countMinOnes; logic countMinTens; logic countHourOnes; logic countHourTens; always_ff @(posedge oneSecondEnable) begin temp = ~temp; LEDR = temp; end sevenSeg digit0(.H(HEX0), .B(countSecOnes)); defparam oneSecond.n = 26; defparam oneSecond.k = (50000000)/75; //5000000 moduloCounter oneSecond(.clk(CLOCK_50), .enable(1'b1), .resetN(KEY), .rollover(oneSecondEnable)); logic rollOnes; defparam ones.n = 4; defparam ones.k = 9; moduloCounter ones(.clk(CLOCK_50), //oneSecondEnable .resetN(KEY), .enable(oneSecondEnable), //1'b1 .count(countSecOnes), .rollover(rollOnes)); sevenSeg digit1(.H(HEX1), .B(countSecTens)); logic rollTens; defparam tens.n = 3; defparam tens.k = 5; moduloCounter tens(.clk(CLOCK_50), //tenSecondEnable .resetN(KEY), .enable(oneSecondEnable & rollOnes), //1'b1 .count(countSecTens), .rollover(rollTens)); sevenSeg digit2(.H(HEX2), .B(countMinOnes)); logic rollMinsOnes; defparam onesMin.n = 4; defparam onesMin.k = 9; moduloCounter onesMin(.clk(CLOCK_50), //oneMinuteEnable .resetN(KEY), .enable(oneSecondEnable & rollOnes & rollTens), //1'b1 .count(countMinOnes), .rollover(rollMinsOnes)); sevenSeg digit3(.H(HEX3), .B(countMinTens)); logic rollMinTens; defparam tensMin.n = 3; defparam tensMin.k = 5; moduloCounter tensMin(.clk(CLOCK_50), //tenMinuteEnable .resetN(KEY), .enable(oneSecondEnable & rollOnes & rollTens & rollMinsOnes), //1'b1 .count(countMinTens), .rollover(rollMinTens)); sevenSeg digit4(.H(HEX4), .B(countHourOnes)); logic rollHourOnes; defparam onesHour.n = 4;//4 defparam onesHour.k = 9;//9 moduloCounter onesHour(.clk(CLOCK_50), //oneHourEnable .resetN(KEY), .enable(oneSecondEnable & rollOnes & rollTens & rollMinsOnes & rollMinTens), //1'b1 .count(countHourOnes), .rollover(rollHourOnes)); sevenSeg digit5(.H(HEX5), .B(countHourTens)); logic rollHourTens; defparam tensHour.n = 3;//4 defparam tensHour.k = 5;//5 moduloCounter tensHour(.clk(CLOCK_50), //tenHourEnable .resetN(KEY), .enable(oneSecondEnable & rollOnes & rollTens & rollMinsOnes & rollMinTens & rollHourOnes), //1'b1 .count(countHourTens), .rollover(rollHourTens)); /*this is the part that doesn't work always_ff @(posedge oneSecondEnable) begin if (rollHourTens ==2 & rollHourOnes==4) begin reset; end end */ endmodule
0 Kudos
5 Replies
Altera_Forum
Honored Contributor II
845 Views

What problems are you having? What have you tried so far?

0 Kudos
Altera_Forum
Honored Contributor II
845 Views

 

--- Quote Start ---  

What problems are you having? What have you tried so far? 

--- Quote End ---  

 

 

 

The problem is the always_ff if statement doesn't do anything. The clock continues to count on. We reset each counter on the individual HEX displays once it hits 9, but we can't stop the hours counters because they need to roll through 9 twice then only count to 4. I don't know if we should be trying to count to larger numbers by utilizing two hex displays, or continue on the path of each display counting independently. I do not know the syntax to count to larger numbers on two displays or to create an effective if statement that will cause a reset when counters reach the specified numbers.
0 Kudos
Altera_Forum
Honored Contributor II
845 Views

I suggest you need to work out a mechanism to reset the clock at the correct time. Have you tried drawing the circuit (on paper) to work out how you're going to connect the reset?

0 Kudos
Altera_Forum
Honored Contributor II
845 Views

The reason for the always_ff block not working is because you'v used the bit-wise AND (&) operator and not the logical AND (&&). Change the '&' to '&&' and try. It will trigger this time. 

 

/*this is the part that doesn't work always_ff @(posedge oneSecondEnable) begin if (rollHourTens ==2 & rollHourOnes==4) begin <------ Change this to logical && from the bitwise & reset; end end */
0 Kudos
Altera_Forum
Honored Contributor II
845 Views

 

--- Quote Start ---  

The reason for the always_ff block not working is because you'v used the bit-wise AND (&) operator and not the logical AND (&&). Change the '&' to '&&' and try. It will trigger this time. 

 

/*this is the part that doesn't work always_ff @(posedge oneSecondEnable) begin if (rollHourTens ==2 & rollHourOnes==4) begin <------ Change this to logical && from the bitwise & reset; end end */  

--- Quote End ---  

 

 

Altho the answer is technically correct (you should syntactically be using && here instead of &) it won't change the result ... the result of x==y will be '0' or '1', and &ing two of these together will still produce a single bit result '0' or '1' that can be tested by the if

 

What does the line 'reset;' refer to? There is no other code (like a function or task or block) with this name in your code listing.
0 Kudos
Reply