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Hiding VHDL code (Black Box)

Altera_Forum
Honored Contributor II
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Hi, 

I am currently working for a company where there are two different departments doing two different major blocks of the design. Anyway we are getting close to the integration phase and my boss is telling me that we cannot show our source code to the other department and from what I understand they too are unwilling to show theirs. 

 

Anyway my question is, is there a way to create a component (like a black bos I think is the term) which we can provide to the other group which will prevent them from seeing our source code? Possibly this is more of a general VHDL question rather than an Altera specific one, but please forgive if the post seems a little out of place. I am unsure if Quartus would have a feature to help with this. 

 

Also, i am interested to know if this type of occurence is normal in companies where different departments act like they are competing companies. Is it normal practise in companies to hide source code between departments in anyone´s expereince? 

 

I´m not too keen on the idea myself, as I am thinking about when it come to debugging any errors, it will be difficult to know where to start if both parties do not have access to the entire sopurce code. 

 

I appreciate any tips on weather or not it is possible to incorporate a portion of a desiggn into a black box. 

 

Many thanks for the help
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Altera_Forum
Honored Contributor II
382 Views

QXP as source is what you want. This is basically using the Incremental Compilation flow, whereby you export a .qxp on your synthesized design and the other department adds the .qxp file as if it's a source file. The .qxp is a binary, so should be good enough. (It's probably re-workable with HUGE amounts of engineering time, which I assume isn't a concern) 

I've seen separate companies integrate their designs into a single FPGA, where it makes sense that they don't share source, and that often ends up in finger-pointing and lots of complaints on both sides. I can't fathom why this would be considered good within a company. That doesn't mean "company politics" have overriding conditions, it just doesn't seem like a good idea. You haven't stated any reason why this extra work is being justified, so it's hard to say.
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Altera_Forum
Honored Contributor II
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hi, 

 

QXP is a good idea. And I think you have another choice, you can set in QII's settings and let the soft saving a node-level netlist for all your design after compiling. You only supply the netlist to your partner when integrating.
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Altera_Forum
Honored Contributor II
382 Views

Many thanks for the replies. 

 

I had a quick look on the web and there seems to be plenty of help, it looks straight forward. I'll study it in a bit more detail and post back if I have any problems. 

 

Many thanks again for the help
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