Hi,Following this example https://www.altera.com/en_us/pdfs/literature/an/an754.pdf, I tried to implement a mipi-csi2 function on a Cyclone V. I have 2 pairs of 2 lines, one is single-ended for low-power mode and one is differential for High-speed mode. My problem is to set the differential pair to High-Z when mipi bus is in low-power mode, It seems to be impossible. Is there a way to manage this issue ? Thanks
It's possible, review application notes about bus LVDS and how to implement it in Cyclone V. It has to use differential SSTL I/O standard.It's actually a FPGA hardware rather than VHDL question, wrong forum.