Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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How Quartus estimate Routing Hotspots

ZYusu
Beginner
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Routing Hotspots.png

I am using Quartus Prime 17.1, Cyclone V chip.

I am placing similar circuit in several different LABs, need to maintain a very close Routing Hotspots (%) among them.

Anyone can help me how Quartus calculate the Routing Hotspots in detail? Which wire contribute to it?

Is there any documentation explaining about Routing Hotspot in detail?

Figure attached showing a LAB with Routing Hotspots of 83% viewing in Chip Planner.

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KhaiChein_Y_Intel
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Hi,

 

The routing is automatically done by the tool where user cannot control it. Unfortunately, we do not have the documentation about the routing algorithm since it is confidential.

 

Thanks.

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ZYusu
Beginner
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Thanks for your response.

I thing you misunderstanding about what I am asking. It is true that routing done automatically, but we can manage the routing by relocating some circuits/ gates.

Quartus showing Routing Hotspots in percentage (%). In my previous post, it is 83%. One more example of this attached here. It is showing Routing Hotspots of 7%. The fig also showing that only 1 wire (element) out of 28 used there around LAB X7_Y73.

How Quartus estimate (calculate) it to be 7% ?

I think Quartus should provide this information.

In my project, I want to put similar circuit in several LABs. The routing hotspot in those LABs should be similar or very close.

 

Forum 2.png

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sstrell
Honored Contributor III
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I'm not sure what you're trying to achieve here. Routing hotspots are indicated based on the setting you selected when generating the routing utilization report in the Chip Planner (the slider where you choose what routing utilization you want to consider to be a hotspot aka the heat map).

 

Unless you are running into a no fit situation or you are having timing issues, you don't really need to be concerned with this. Is there a problem like this when you compile?

 

#iwork4intel

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KhaiChein_Y_Intel
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Hi, Do you see any problem / error in the compilation? Thanks
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