How can I use the LUT chain interconnect?

[SYosh17]

I want to create 6-input NAND gate using the LUT chain interconnect.

How can I use the LUT chain interconnect?

I'm using Cyclone IV.

[JohnT_Intel]

Hi,

When you implement your design (6-Input NAND gate) it will directly optimize the design and use LUT chain interconnect when necessary. There is no way to manually implement it.

[SYosh17]

Hi,

Thank you for answering.

I implement very simple example of 6-input NAND. The place and route result of this design using 2 LE, which placed different LAB. I think it does not use LUT chain interconnect. I attached the project files.

Is there any example using LUT chain interconnect?

[JohnT_Intel · Accepted solution]

Hi,

If you look into https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyiv-51002.pdf, the carry chain can only be used in Arithmetic mode. So it is not possible to implemented using NAND gate.

[SYosh17]

I got it. Thank you very much!