How do I conserve FPGA RAM using SignalTap?

[DKirv]

My understanding of SignalTap is that signal data is saved on each rising clock edge. In my code, I have some large std_logic_vectors. They have 200 bits. I can only see a short time span due to its size and my chipset. I only need to see this signal on a rising edge of another bit signal or if the signal value changes. Is there a way to configure SignalTap to allow one to see a particular signal differently from the others and allow one to save resources?

[bitwise]

​You can't have different signals in the same instance of SignalTap stored differently (per settings in Signal Configuration), however you can have multiple instances of SignalTap in one .stp file. That would allow you to create one instance with your 200-bit vector that utilizes the transitional storage where it only records changes, while the other instance runs in the normal mode.

To create another SignalTap instance, use the Instance Manager (typically at the top of the screen when you're viewing your SignalTap file in QuartusII. If you don't see it then select "View" menu and make sure it has a check beside it). You should see your current instance which will be named "auto_signaltap_0" unless you renamed it. Left-click on that name then right-click and select "Create instance". A new instance, "auto_signaltap_1" should now appear. You can double-click on either instance to select its signal set and signaltap configuration. They coexist within the same Signaltap file.

For starters, left-click on the new instance and change the storage qualifier from "Continuous" to "Transitional"; that will allow you to record only the changes which saves memory, especially on wide vectors. You will then need to add your wide signal to this new instance and of course remember to remove that signal from the original instance. 

You mentioned a storage qualifier; you can also implement that by checking the "Trigger in" box and selecting "Node" then browsing to pick that signal.

For housekeeping you could rename your instances (select in the manager, right-click and select "Rename instance"). They are now all part of the same signaltap file and both will be available after you compile the updated file into your project.

[DKirv]

Thank you very much. You described every bit very wisely. A befitting name.