How to design a single processor in verilog? - Intel Community

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How to design a single processor in verilog?

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I'm having trouble doing homework verilog Altera: design a simple processor (lab9-&10). I do not know how to design it? Please help me!!!

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You can refer to : http://opencores.org/project,avr_hp

Hope it'll help...

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http://opencores.org/project,8051

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