I'm really new to Quartus Prime and the DE10-Lite so I appreciate your basic help. I'm using the LPM Counter to divide down to about a 2 Hz clock and then sending that to an output pin, through a jumper wire plugged into the DE10-Lite board, and back to an input. See logic in my attached image. Is there an easy way to avoid the external jumper and directly connect my divided-down clock signal to other logic in the schematic block? Thanks in advance!
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Well, that was incredibly easy to solve! I just named the bus q[23] as shown in this new figure and it works great with no jumper.
Hi,
Just dropping by a helpful link for you:
https://fpgacloud.intel.com/devstore/platform/?acds_version=any&family=max-10&board=73
There you can find the Tutorials in the Category tab or some Design Examples, etc..
You also can search for the type of IP you want to look for in the IP Core tab ADC, DSP, etc..
Best Regards.
Thank you!
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