I am new in FPGA and got the task to develop an Ethernet switch in HLS and I don't know how to do it. Is there any example code?
Here are the requirements for the implementation:
- 1Gbit/s at 62.5MHz is 1-2 clocks per 32bit word. - External interfaces 3 x Axistream RX and 3 x Axistream TX - Axistream Word consists of 32bit + 4bit keep + 1bit last - The frames contain no preamble and no frame check sum only Ethernet headers with payload. - The routing or switching decision should be completely static (no learning). - The interfaces should be assigned a static MAC address manually. - Packets with the corresponding destination address are forwarded to the corresponding interface. - Furthermore, it should be possible to set an interface as default. All packets with unknown MAC addresses are sent to this interface.