Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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How to set constrain rules when there are negative slacks on hold time analysis

NZhan1
Partner
859 Views

In Timequest, we can get hold time analysis. What could we do, when there were negative slacks on hold time analysis.

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skyjuice
Employee
718 Views

We need to understand the reason behind hold failure. In most cases, Quartus will add additional routing delay to satisfy hold requirements unless these problematic paths are not realistic to begin with.

Are these cross-clock transfers? Do they have huge clock skew?

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Kenny_Tan
Moderator
718 Views

Any update?

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