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I am trying to use the I2C_slave to Avalon Intel IP. Does anyone know what clock speed it requires? Plus is there a simple explanation of the address interface?

GFros2
Beginner
196 Views

The I2C interface hangs depending on the clock speed. I am using 0, 4, 8 etc address boundries to write 4 bytes to the part. Tends to work most of the time but fails some of the time. I.e. pretty useless at the moment. (Cyclone 10 part with Prime lite) Any pointers or suggestions would be helpful.

Geoffrey

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4 Replies
KhaiChein_Y_Intel
181 Views

Hi Geoffrey,

 

There is no documentation about the clock speed. Is there timing violation in the design?

 

Thanks.

Best regards,

KhaiY

GFros2
Beginner
181 Views

I tried a slow clock speed of about 10MHz as I thought the interface was only working at 100KHz. My clock is derived from an HDMI receiver - 130MHz when connected but 40MHz with no video. I have to cope with both.

The real problem with the module is trying to understand how it works. The bytes are all mixed up, address and data, on the avalon side. If the lower two bits of one? of the address bytes is non zereo the part gets locked up and I have to reload the whole design. All I need is an I2C receiver that has a main and sub address along with 16 bits of data to configure various sections of my picture scalar.

Geoffrey

KhaiChein_Y_Intel
181 Views

Hi Geoffrey,

 

You may refer to Chapter 16. Intel FPGA I2C Slave to Avalon-MM Master Bridge Core in https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_embedded_ip.pdf to understand how this IP works.

 

Thanks.

Best regards,

KhaiY

KhaiChein_Y_Intel
178 Views

Hi Geoffrey,

We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best regards,

KhaiY

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