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IRQ sender for my personal IP

CAlex
New Contributor II
1,341 Views

Hi,

 

I wrote a personal IP which will send IRQ to HPS(Liunx) in some situation.

I'm planning to write the LKM to use that IRQ.

 

CAlex_0-1679542217839.png

But parameter setting confused me a lot.

Could you guys explain the IRQ sender settings for me?

What are they? How they should be set to what purpose?

Why there is the clock and reset selection, what's the purpose of that?

Where can I find these setting information?

Thanks.

 

reguards.

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13 Replies
CAlex
New Contributor II
1,328 Views

And as I select none to every select the Platform Designer gave me the following warning:

CAlex_0-1679557091204.png

any one knows how to fix that?

 

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JingyangTeh
Employee
1,281 Views

Hi


I have consulted the engineering team on this information.

I will update you when there is new information from the engineering team.


Regards

Jingyang, Teh


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JingyangTeh
Employee
1,266 Views

Hi


There is still no reply from engineering team.

However I have asked around my senior colleagues of mine and they said that one to two clock cycle of the periphclk should be sufficient.

The interrupt signal is a conduit of 32 bits length associating to 0 to 31 of the interrupt number.


Regards

Jingyang, Teh


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CAlex
New Contributor II
1,261 Views

Hi,

 

Thank you for your help,

but still I don't understand the settings mean.

Looking forward to the engineering department official reply on explaining the what these settings do.

 

Reguards.

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JingyangTeh
Employee
1,227 Views

Hi Alex


You could refer to the document in the link below for more details on the signals:

https://www.intel.com/content/www/us/en/docs/programmable/683091/20-1/interrupt-sender-properties.html


Regards

Jingyang, Teh


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CAlex
New Contributor II
1,221 Views

Hi,

In that case, it says it's the name of linked Avalon-mm port name.

CAlex_0-1680502401998.png

And if I put the irq signal to the f2h_irq directly, do I need to set the Avalon MM name,clock and reset signals?

If it must, is that the Avalon MM pipeline bridge my_timer connected to?

 

 

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JingyangTeh
Employee
1,190 Views

Hi Alex


For the "Interrupt Sender Properties", it is the minimum required signals that needs to be present in your custom IP.

If you refer to the timer IP, the timer IP there is a reset input signal, clock input signal, avalon input signal and interrupt output signal.

You could leave the avalon signals unconnected, it should be able to run.

It is required to access the register or set settings from the avalon master.


Regards

Jingyang, Teh



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CAlex
New Contributor II
1,180 Views

Hi,

For my custom IP, I set some inputs as well:

input:   16bit control register, 16bit timer flag register

output: 16bit timer irq signal.

Please correct me if Im wrong:

In that case, if I want to control the timer in my usersapce & kernel space, I have to use Avalon MM bridge.

And my interrupt setting(the sender setting in platform designer) can be keep blanked?

 

Thank you 

 

Reguards.

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JingyangTeh
Employee
1,127 Views

Hi Alex


The Interrupt sender setting is referring to the input signal that you have.

input:  16bit control register, 16bit timer flag register

The signals are associated to the interrupt.

Like it is required as part of the interrupt. E.g. after interrupt you would either get data or set data to the IP.

The clock are required to sink the communication between the HPS and IP.

You need to use the Avalon MM to communicate between HPS and IP.


Regards

Jingyang, Teh


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CAlex
New Contributor II
1,122 Views

Hi,

 

In that case, in the IP interrupt sender setting,

my "Associated addressble interface" should be my IP master(which is a Avalon MM bridge),

then what's the "offset" and "bridges to receiver" stands for?

 

Reguards.

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JingyangTeh
Employee
1,092 Views

HI Alex


The offset refers to the split bytes of the Avalon Slave.

In the table the host is a 32 bit long where as the slave is 8 bit long.

There will be 4 packets of data from the slave to the host.


Regards

Jingyang, Teh



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JingyangTeh
Employee
1,064 Views

Hi Alex


Any update on this case?


Regards

Jingyang,Teh


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JingyangTeh
Employee
1,011 Views

Hi


Since there are no feedback for this thread, I shall set this thread to close pending. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


If you happened to close this thread you might receive a survey. If you think you would rank your support experience less than 10 out of 10, please allow me to correct it before closing or if the problem can’t be corrected, please let me know the cause so that I may improve your future service experience.


Regards

Jingyang, Teh


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