If the logic of an Output pin in the design is set to LOW, and the pin is set to Assignment Editor/Weak Pull-Up Resistor = On in QuartusII, what happens to the I/O pin?

[KJalte2]

Please refer to the attached file.

[AnandRaj_S_Intel]

Hi,

Output pin in the design is set to LOW, and the pin is set to Assignment Editor/Weak Pull-Up Resistor

>>output is logic Logic LOW.

Output pin in the design is set to HIGH, and the pin is set to Assignment Editor/Weak Pull-Up Resistor

>>output is logic Logic HIGH

 Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

regards

Anand.