Hi,
The memory content editor keeps crashing on me, so I've created a bare-bones Quartus project that only instantiates the required RAM: 1-Port megafunction, input 50 Mhz clock of a DE0-Nano-SOC board.
After programming, the content editor does report the RAM instance on the FPGA, and I can read out the memory (populated from a MIF). But anytime I try to write back changes or the entire image, the status changes to "Acquiring" for some time, freezing up Quartus, and then I always get an access violation (Quartus quit unexpectedly).
I'm new to FPGA design, so I may have overlooked a few silly prerequisites. In the .sdc file, I tried adding
create_clock -period "30.303 ns" -name {altera_reserved_tck} {altera_reserved_tck}
as that seemed to be the recommended clock, but this didn't change anything...
It's Quartus Prime 16.1 Lite on Windows 7 SP1.
Any help is much appreciated : )
Michael
