Input pins never detect a LO

[Altera_Forum]

All, 

My setup: Quartus II 9.0 MAX-II schematic entry  Don't know if this is a Quartus II issue or MAX-II issue. No matter what I set my pins to I can never detect a LO (GND) (simple circuit schematic) The only way I can get the ADDR_Equal is when all inputs are HI (or floating will work on all 6 configurations also) I have tried all 6 ways for setting my inputs. 3.3-V LVTTL 3.3-V LVCMOS 3.3V Schmitt Trigger Input 3.3-V LVTTL with pullups 3.3-V LVCMOS with pullups 3.3V Schmitt Trigger Input with pullups  Anybody have any ideas on what I am doing wrong?  I have done a simple 2-input AND gate and in Never works when the input pins have the pullups. Keith

[Altera_Forum]

OK All, 

Here is my next question. I have an output pin that is directly tied to an input pin..... and the output doesn't even follow the output. Some are stuck HI and some are stuck LO.  This is happening on 2 different PLDs.... so.... what am I doing wrong? What is wrong with my setup?  Keith

[Altera_Forum]

All, 

..... I changed my CHIP_ID and addr_rd inputs to pins 1-8 and all things seem to be working. They all still go to the same I/O bank as before (pins 12-15, 27-30), but now they seem to be working. Anyway, I will mark this up for experience and see about shifting pins around next time.  (now I have a harder time to layout my PCB)  Thanks again, Keith