Is it possible to infer eSRAM via synthesis attributes in HDL code?

[AUrsi1]

Is it possible to infer eSRAM via synthesis attributes in HDL code?

Examples of HDL RAM inference in general are here
https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/hdl/vhdl/vhdl_file_dir_ram.htm

and also in section 1.4.1.4 here

https://www.intel.com/content/www/us/en/docs/programmable/683082/23-1/controlling-ram-inference-and-implementation.html

In these resources, allowable values for the "ramstyle" attribute are "M9K", "M10K", "M20K", "M144K", "MLAB, "no_rw_check", "logic". In other words, no eSRAM. Is the platform designer the only way to infer eSRAM?

[Nurina]

Hi,

As far as I know you can only infer it using Platform Designer. There are no available HDL code templates to infer it.

Regards,

Nurina

[Nurina]

Hi,

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