I refer to Table 3-26 Global clock period for Max V and the maximum period is not specified. When I tried setting clock constraints of 32Hz (global clock), compiler ignored the clock constraints due to invalid clock period. What is the maximum period that Max V can accept for it's Global Clock?
there's no maximum clock period specified, because MAX V logic cells are fully static. As far as I'm aware of, there are no functions involving a minimal clock speed, like e.g. PLLs.
Time range of timing analysis may be restricted to 2^32 ps or something like this.