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OThys
Beginner
788 Views

Message ID: 18591 Error: Can't recognize the flash device that attached to device 2. The flash device is not supported by Quartus prime software. Device: ARRIA 10 GX 10AX115S2F45 Software: Quartus pro 17.0 and Quartus pro 18.1

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Could you please assist?

I am trying to upload a bit file, when i lunch the autodetection of the device i automatically get this error.

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1 Solution
OThys
Beginner
413 Views

Hi Wolfgang

Thanks for replying.

I have tried what you have suggested but unfortunetly nothing worked, until now i still have that annoying message popping up every time i want to upload a file onto the ARRIA 10.

I found a way around this problem by bypassing the MAX FPGA 5M2210Z, i delete the Max FPGA 5M2210Z and then send the 10AX115S2F54 right up before the 10X115S2 FPGA. Make sure, there is a tick on Program/configure. Click Start to install.

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3 Replies
ShafiqY_Intel
Employee
413 Views

Hi OThys,

 

Below are the suggestion workarounds you can try. You can try either one of these suggestion:

 

  1. Set your SW4 switch to default position setting. (refer to attachment picture)
  2. Set Switch 1 (MAX V) to ON position. Switch 1,3,4 set to default position setting. (refer to attachment picture)
  3. Changes your TCK frequency to 6 MHz (default value).

 

A10 sw4 UG.JPG

 

I hope this will help.

 

Thanks😉

OThys
Beginner
414 Views

Hi Wolfgang

Thanks for replying.

I have tried what you have suggested but unfortunetly nothing worked, until now i still have that annoying message popping up every time i want to upload a file onto the ARRIA 10.

I found a way around this problem by bypassing the MAX FPGA 5M2210Z, i delete the Max FPGA 5M2210Z and then send the 10AX115S2F54 right up before the 10X115S2 FPGA. Make sure, there is a tick on Program/configure. Click Start to install.

View solution in original post

NithinGowda
Employee
324 Views

Hi,

Error(18591): Can't recognize the Flash device that attached to device 1. The Flash device is not supported by Quartus Prime software.

I have similar issue in programming Stratix 10 FPGA. Please find below the screenshot of the window and suggest a solution for this.

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