ModelSim message display issue

[JA24]

Hi,

I'm a student for studying verilog and simulation by using ModelSim.

I setup my enviornment with 'ModelSim Intel FPGA 2020.1 Starter edition'

Actually, I read some pdf files Intel provided, did some fixes.. but I couldn't fine proper solution for below.

I made files with verilog with $display. 

But I cannot see print of $display on my transcript.

What I did was 

(1) Add msgmode and displaymsgmode options with both

  ---> Not effective  (*I copied ini file, updated options, and linked it when making new project)

(2) I used '-displaymsgmode both' option with vsim command when launch simulation.

  --> MessageViewer appeared my $display log message, but transacipt didn't yet.

Is there any solution $display message appears on transcript ?

Thanks,

JA24

[RichardTanSY_Altera]

Assuming you are using Quartus Lite/Standard, you can refer to the testbench_1.v file in the quartus-std-lite-pll-ram design example for guidance on how to use it.

https://www.intel.com/content/www/us/en/docs/programmable/703090/21-1/simulation-quick-start.html

By the way, ModelSim has been replaced by Questa Intel FPGA Edition, and there are no plans to fix any issues found in ModelSim.

We recommend using Questa Intel FPGA Edition. (starter or non-starter version, depending on your need)

Regards,

Richard Tan

[HubertG]

Hi JA24,

Beyond this, is there any further question that need our assistance ?

Best Regards

Hubert

[HubertG]

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.