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Altera_Forum
Honored Contributor I
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Need SPI core variant advice - Altera FPGA development kit '3-wire DAC'

I need to write to the 3 pin SPI DAC on Intel Max10 FPGA Development Kit from C using NIOS soft processor. 

 

There are several SPI IP varieties to choose from in Platform Designer.  

I'm not sure which SPI variant to choose and i'm not able to find a demo or documents/videos on this subject.  

The DAC is the three pin SPI DAC, so I expect that the best choice is the 'SPI-(3 wire Serial)', but I would like to confirm this. Is this the logical choice? 

What do you use most often? Example of typical code? Thanks for your help. 

 

Bob
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3 Replies
Altera_Forum
Honored Contributor I
63 Views

I have successfully used SPI (3 Wire Serial) to drive slow ADCs and DACs with both NIOSII/C program and HPS/Linux. 

 

depending on your dac type you can have different code. Mine was simple: 

 

int DACSetVoltage(float V, int DACnr) { int value = DACVoltage2Bit(V); // this is my function that converts float value to binary corresponding to DAC type and reference voltage used. alt_u8 array; array = value>>8; array = value & 0xff; return alt_avalon_spi_command(DAC_SPI_BASE, DACnr, 2, array, 0, 0, 0); }
Altera_Forum
Honored Contributor I
63 Views

 

--- Quote Start ---  

I have successfully used SPI (3 Wire Serial) to drive slow ADCs and DACs with both NIOSII/C program and HPS/Linux. 

 

depending on your dac type you can have different code. Mine was simple: 

 

int DACSetVoltage(float V, int DACnr) { int value = DACVoltage2Bit(V); // this is my function that converts float value to binary corresponding to DAC type and reference voltage used. alt_u8 array; array = value>>8; array = value & 0xff; return alt_avalon_spi_command(DAC_SPI_BASE, DACnr, 2, array, 0, 0, 0); } 

--- Quote End ---  

 

 

Thanks, settem. Which core are you using, and if you don't mind, what is the DAC part number? I may be able to figure something out from that much.
Altera_Forum
Honored Contributor I
63 Views

Also - When hooking up an SPI DAC to Altera FPGA, is it most common to use the DAC as master? and use a SPI slave core IP in Platform Designer? Thanks for your help.

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