Need SPI core variant advice - Altera FPGA development kit '3-wire DAC'

Altera_Forum · ‎06-15-2018

I need to write to the 3 pin SPI DAC on Intel Max10 FPGA Development Kit from C using NIOS soft processor.

There are several SPI IP varieties to choose from in Platform Designer.

I'm not sure which SPI variant to choose and i'm not able to find a demo or documents/videos on this subject.

The DAC is the three pin SPI DAC, so I expect that the best choice is the 'SPI-(3 wire Serial)', but I would like to confirm this. Is this the logical choice?

What do you use most often? Example of typical code? Thanks for your help.

Bob

Altera_Forum · ‎06-15-2018

I have successfully used SPI (3 Wire Serial) to drive slow ADCs and DACs with both NIOSII/C program and HPS/Linux.

depending on your dac type you can have different code. Mine was simple:

int DACSetVoltage(float V, int DACnr)
{
    int value = DACVoltage2Bit(V); // this is my function that converts float value to binary corresponding to DAC type and reference voltage used.
    alt_u8 array;
    array = value>>8;
    array = value & 0xff;
    return alt_avalon_spi_command(DAC_SPI_BASE, DACnr, 2, array, 0, 0, 0);
}

Altera_Forum · ‎06-15-2018

--- Quote Start ---

I have successfully used SPI (3 Wire Serial) to drive slow ADCs and DACs with both NIOSII/C program and HPS/Linux.

depending on your dac type you can have different code. Mine was simple:

int DACSetVoltage(float V, int DACnr)
{
    int value = DACVoltage2Bit(V); // this is my function that converts float value to binary corresponding to DAC type and reference voltage used.
    alt_u8 array;
    array = value>>8;
    array = value & 0xff;
    return alt_avalon_spi_command(DAC_SPI_BASE, DACnr, 2, array, 0, 0, 0);
}

--- Quote End ---

Thanks, settem. Which core are you using, and if you don't mind, what is the DAC part number? I may be able to figure something out from that much.

Altera_Forum · ‎06-20-2018

Also - When hooking up an SPI DAC to Altera FPGA, is it most common to use the DAC as master? and use a SPI slave core IP in Platform Designer? Thanks for your help.