Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Newbe Question: Quartus lite -- installing new ip (for audrino Vidor)

Dan18
Novice
249 Views

Hello,

I am using Quartus lite to work with the Audrino Vidor which includes a Cyclone 10 FPGA and am trying to get a sample project working [1].

 

After compiling i get an error that one of the IPs referenced isn't known and that it needs to be added to the path.

 

I found a number of IPs for the Audrino i got from a github, and saved in a local folder, but can't figure out how to add these to the known IPs.

 

I noticed some global and local path settings for IP, but adding the folder in both of them doesn't recognize them.

 

Any guidance to get them added is much appreciated.

 

thank you,

Dan

 

[1] https://www.arduino.cc/en/Tutorial/VidorQuartusVHDL

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3 Replies
sstrell
Honored Contributor III
243 Views

What is the exact error you are getting?

What is the file format of the IP?  HDL code in .v or .vhdl?  How are you instantiating the IP in your design?

Dan18
Novice
235 Views

Thank you for your reply.

 

The error message i got was that the system PLL was not found. I later found for the Vidor board a system_pll ip files (system_pll.ppf, system_pll.qip, system_pll.v) on a git and simply copied those files into the working directory of the project. This worked to get the error disappear.

 

thanks,

 

Dan

Nurina
Employee
228 Views

Hi Dan,

 

Thanks for sharing your solution. I shall close this thread. Feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

 

Regards,
Nurina

P/S: If you like my comment, feel free to give Kudos. If my comment solved your problem, feel free to accept my comment as solution!

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