Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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No output while simulation using Waveform Editor

Jaganathan
Beginner
327 Views

I tried simple circuit using not gate as per below

Jaganathan_0-1650085718576.png

and I simulated using waveform editor, but there is no output in simulation. Refer below image,

Jaganathan_1-1650086096705.png

My Quartus Edition: Quartus Prime Lite Edition Ver 21.1.

Please advise.

 

Attached project I created for your reference.

0 Kudos
4 Replies
RichardTanSY_Intel
292 Views

I able to output in the simulation though. With the Modelsim Intel edition set as the EDA Tool Options in Quartus.


I not sure why you place the waveform4.vwf in the /output_files directory, it made the Quartus cant find the vwf.vt files needed to run simulation.

Anyhow, I move the files to the same folder with .qpf project files. Open the Waveform editor > Simulation > simulation setting. Click Restore Default and remove the -novopt from the script.

Save and run functional simulation. Everything runs successfully and the F node output the waveform correctly.


RichardTanSY_Intel
278 Views

I have yet to receive any response from you to the previous question/reply/answer that I have provided but I believed that I have answered your question. 

With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


Best Regards,

Richard Tan


p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 


StefanoMarsi
Beginner
229 Views

I have the same problem too:

No output signal comes using "Run Functional/timing Simulation" inside Simulation Waveform Editor.
I tried different simulators (Modelsim/Questa) but even if the process terminates successfully without any error, no output is displayed.

StefanoMarsi
Beginner
227 Views

OK I Found the solution by myself:

1- Instead of removing the "-novopt" from the simulation options try add it with :  -suppress 12110
(e.g: vsim -suppress 12110 -novopt $ elabcommand )

2- Control that in the folder  "C:\intelFPGA_lite\21.1\questa_fse\intel\verilog\cyclonev"  (depending from your device)  you have a complete write access.

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