OpenCL Memory Banks

[Altera_Forum]

Hi, I have a short request for clarification. 

 The Altera OpenCL ext header file defines 7 flags for memory banks, CL_MEM_BANK_1_ALTERA to CL_MEM_BANK_7_ALTERA.   I am using a Nallatech Stratix V pcie 385 with 2 DIMMS. Does this mean that I can/should only use the two flags CL_MEM_BANK_1_ALTERA and CL_MEM_BANK_2_ALTERA? If yes, what happens if I use flags for banks > 2? Do they get mapped to bank 1? Or are they mapped modulo 2 (that is, 1 and 2 alternating)? If indeed I can use all 7, what is the "scheduling" algorithm used?  As always, thanks for your help! Christoph

[Altera_Forum]

Those flags are used so that you can allocate buffers to each memory bank instead of relying on the default interleaving where data is interleaved amungst all the banks. How the tools behave when you attempt to use the flags that map to memory banks that don't exist on the board I have no clue but my advice would be don't do it regardless how it behaves because that behavior is not specified and could change. 

 I would take a look at the section called "Optimize Global Memory Accesses" in the optimization guide to learn more about how to use these flags: http://www.altera.com/literature/hb/opencl-sdk/aocl_optimization_guide.pdf